gem5Homework2-Implement_FSUBR

2026-03-27
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the ISA files are all in src/arch/[architecture]/isa.For example,the subset of x86–x87 is in src/arch/x86/isa.

According to the manual of x87,all x87 instructions begin with an opcode byte in the range 0xD8(1101 1000) to 0xDF(1101 1111).Therefore the topmost 5 bits always are 0x1B.

The files by which gem5 decode op-code are written by a language designed specifically to express instruction sets. The content of these files will be ultimately converted to a C++ switch case,which means these files are DSL.

The gem5 decode the instruction bottom 3 bits,such as: 

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0x1B: decode OPCODE_OP_BOTTOM3 default Inst::UD2() {
        0x0: decode MODRM_REG {
            0x0: Inst::FADD1(Ed);
            0x1: Inst::FMUL1(Ed);
            0x2: fcom();
            0x3: fcomp();
            0x4: Inst::FSUB1(Ed);
            0x5: fsubr();
            0x6: Inst::FDIV1(Ed);
            0x7: fdivr();
        }

For example,FSUB is decoded to 0xD8.Thus,it is represented with 0x0.according to the manual.

Files in src/arch/[architecture]/isa/insts/[architecture]/arithmetic holds the implements of those macro-op.For example,the implement of FSUB is placed in src/arch/x86/isa/insts/x87/arithmetic/subtraction.py: 

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microcode = """
def macroop FSUB1_R
{
    subfp st(0), st(0), sti
};
  
def macroop FSUB1_M
{
    ldfp ufp1, seg, sib, disp
    subfp st(0), st(0), ufp1
};

def macroop FSUB1_P
{
    rdip t7
    ldfp ufp1, seg, riprel, disp
    subfp st(0), st(0), ufp1
};

def macroop FSUB2_R
{
    subfp sti, sti, st(0)
};

def macroop FSUB2_M

{
    ldfp ufp1, seg, sib, disp
      subfp st(0), st(0), ufp1
};  

def macroop FSUB2_P
{
    rdip t7
    ldfp ufp1, seg, riprel, disp
    subfp st(0), st(0), ufp1
};

def macroop FSUBP
{
    subfp st(1), st(1), st(0), spm=1
};
def macroop FSUBP_R
{
    subfp sti, sti, st(0), spm=1
};
def macroop FSUBP_M
{
    fault "std::make_shared<UnimpInstFault>()"
};
def macroop FSUBP_P
{
    fault "std::make_shared<UnimpInstFault>()"
};
def macroop FSUBRP_R
{
    subfp sti, st(0), sti, spm=1
};
# FISUB
# FSUBR
# FISUBR
"""

By declaring macro-op and implemente them in arithmetic,we can add some new codes for research.

Implemente the macro-op: 

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def macroop FSUBR1_R
{
    subfp st(0), sti, st(0)
};
def macroop FSUBR1_M

{
    ldfp ufp1, seg, sib, disp
    subfp st(0), ufp1, st(0)

};
def macroop FSUBR1_P
{
    rdip t7
    ldfp ufp1, seg, riprel, disp
    subfp st(0), ufp1,st(0)

};

def macroop FSUBR2_R
{
    subfp sti, st(0), sti
};

def macroop FSUBR2_M
{
    ldfp ufp1, seg, sib, disp
    subfp st(0), ufp1, st(0)
};

def macroop FSUBR2_P
{
    rdip t7
    ldfp ufp1, seg, riprel, disp
    subfp st(0), ufp1, st(0)
};